Semiconductor device mechanical impact test

The mechanical impact test of semiconductor devices is suitable for evaluating devices in the free state and assembled on printed circuit boards of electrical equipment, and is used to determine the adaptability of devices and printed board assemblies to withstand moderately severe impacts. Mechanical shock to semiconductor devices is caused by sudden forces applied during handling, transportation, or field operations. This type of shock can destroy operating characteristics, especially if the shock pulses are repeated.
Zhongke Testing Environmental Reliability Experiment Center has various mechanical and climatic testing equipment for semiconductor devices, has mechanical impact testing capabilities, and provides professional mechanical impact testing services for semiconductor devices and equipment.

Impact test equipment should be installed on a solid experimental bench or equivalent base and leveled before use. Measures should be provided to prevent the recurrence of impacts due to "bounce" in the equipment. Unless otherwise specified, for the free state, the device or printed board assembly should withstand 30 impacts, 5 pulse impacts each in the positive and negative directions of the three orthogonal axes (X, Y and Z), with the peak acceleration, velocity change and pulse duration selected from the specified test conditions (see Table 1).
If impact testing is required in the installed state, the printed board assembly should withstand 12 impacts, 2 pulse impacts each in the positive and negative directions of the three orthogonal axes (X, Y and Z), with peak acceleration, velocity change and pulse duration selected from the specified test conditions.

GB/T 4937.1-2006 Mechanical and climatic test methods for semiconductor devices Part 1: General
GB/T 4937.10 Mechanical and climatic test methods for semiconductor devices Part 10: Mechanical shock
IEC 60749-10: 2022 Semiconductor devices Mechanical and climatic test methods Part 10: Mechanical shock